It is one of the interesting circuit which I found made me to thinking little more. Only a delay element and a xor gate does this complex job.
Let us say we have 100Hz clock and we need 200Hz clock from it. The block diagram is shown below:
Let us say we have 100Hz clock and we need 200Hz clock from it. The block diagram is shown below:
fig:1 Block diagram
The design of delay element is one of the trick here. It can be a R-C delay element or series of logical gates(inverters) to achieve required delays. However,if RC is used, the output of XOR may be distorted or deviated from required shape. Hence we may need of extra invert/buffers at the output side.
It is also need to understand that, the delay element has impact on the duty cycle of the output waveform.We will discuss the delay elements in some other posts.
If we design the delay element with 50% delay of the period of the original wave form, we will have 50% duty cycle wave form at the output of XOR with frequency double the input CLK. The resulting waveform is shown in figure 2.
It is also need to understand that, the delay element has impact on the duty cycle of the output waveform.We will discuss the delay elements in some other posts.
If we design the delay element with 50% delay of the period of the original wave form, we will have 50% duty cycle wave form at the output of XOR with frequency double the input CLK. The resulting waveform is shown in figure 2.
Fig:2 waveform
Finally, in digital circuits, we can decrease or increase frequency of the wave CLK signals. We can do the same kind of operations on analog signals. We will talk about them in coming posts...Till then bye...
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