We always use PMOS connected to VDD (or vdd side) and NMOS connected to gnd(or gnd side).
Example, in the inverter circuit PMOS is always connected to VDD and NMOS connected to GND.
Now,
1.What happens if we change NMOS and PMOS positions?
2.What is the problem in digital design with new topology(example: inverter)?
3.What is the problem in analog design with new topology(example:amplifier or current mirror)?
A pdf written by me is available on this subject in the link here
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